Sony ramps up smartphone CMOS sensor production

Press Release

Sony increases production capacity for stacked CMOS image sensors

- Increasing total production capacity for image sensors to approximately 60,000 wafers per month to supply image sensors mainly for smartphones -

June 22, 2012, Tokyo, Japan – Sony Corporation ("Sony") today announced that it plans to invest in Sony Semiconductor Corporation's Nagasaki Technology Center ("Nagasaki TEC") from the first half of the fiscal year ending March 31, 2013 through the first half of the fiscal year ending March 31, 2014, to increase the production capacity for stacked CMOS image sensors.*1

This investment is intended to provide for new wafer processing equipment for stacked CMOS image sensors, and to increase and transform wafer lines capable of manufacturing CMOS image sensors. With this development, Sony plans to increase total production capacity for CCD and CMOS image sensors to approximately 60,000 wafers per month by the end of September 2013.*2

In light of the rapidly expanding demand for smartphones and tablets, Sony plans to continue to solidify its leading global position in CMOS image sensors by strengthening its production capabilities for stacked CMOS image sensors, which provide greater performance in a more compact form. Furthermore, Sony intends to accelerate its growth strategy by incorporating superior core technologies, including stacked CMOS image sensors, into a wide range of products for its digital imaging and mobile businesses, which are priorities within its electronics business.

The investment amount is approximately 80 billion yen, of which, the amount to be invested in the current fiscal year ending March 31, 2013 (approximately 45 billion yen) was included in the forecast of the capital expenditures for semiconductors in the current fiscal year announced at the annual earnings release on May 10, 2012. In addition, Sony will utilize a governmental subsidy in its investment plan which will be provided by the Ministry of Economy, Trade and Industry in Japan, through the "Subsidy for Domestic Location Promotion Projects" program.

Sony Semiconductor Corporation's Nagasaki Technology Center

*1: CMOS image sensors in a stacked structure layer the pixel section containing back-illuminated structure pixels onto chips containing the circuit for signal processing, in contrast to the supporting substrates used in conventional back-illuminated CMOS image sensors. These products enable Sony to mount large-scale circuits while decreasing the chip size of image sensors, thereby enhancing image quality and functionality and allowing for a more compact size for digital cameras and mobile devices.
*2: This total production capacity (300mm wafer basis) includes the output of foundry operations to which Sony outsources a part of the manufacturing process. For the purposes of calculating total production capacity, the capacity of 200mm wafer production lines in Kagoshima Technology Center and Nagasaki TEC is converted to the new 300mm wafer production capacity basis.